The present invention relates to a novel bond-pad structure with improved stability so as to increase production yields in semiconductor packaging applications. More specifically, the present invention relates to a novel bond-pad structure which eliminates or at least minimizes the bond-pad lift-off (or peeling-off) problems often experienced during the wire bonding process in the packaging of integrated circuits (ICs), with minimum additional effort. With the novel bond-pad structure of the present invention, the failure rate in the production yield due to bond-pad lift-off can be substantially reduced without requiring major modifications in the fabrication process or facility. The present invention also relates to a novel process which implements the improved bond-pad design to increase the production yield so as to reduce the overall production costs for the manufacturing of integrated circuit packages, as well as to the printed circuit boards (PCBs) or other integrated circuit packages that incorporate the novel bond-pad structure disclosed herein.
During the formation of printed circuit boards (PCBs) or other integrated circuit (IC) packaging processes, the semiconductor devices provided in the printed circuit board can be respectively connected to the outside via a wire-bonding process. In such a process, one or more bonding pads are provided which are in contact with respective parts of the semiconductive device at the outer-most conductive layer thereof. Then, a bonding wire is bonded onto the bond pad so as to allow the semiconductor device to make electric contact with the inner lead of the IC package.
FIG. 1 is a side view showing a typical bond pad structure and how the metal bond pad is positioned relative to other layers in a multi-layered, or laminated, semiconductor device on a wafer surface. Typically, a metal layer (xe2x80x9cmetal-1, or preferably a xe2x80x9clevel-1xe2x80x9d layer as it can be a non-metal layer) is deposited on top of a dielectric layer (dielectric-1, or bottom dielectric layer), then another dielectric layer (dielectric-2, or middle dielectric layer) is formed on the metal-1 layer. Finally a third dielectric layer (dielectric-3, or top dielectric layer) is deposited on the dielectric-2 layer using a photolithography technique leaving a bond pad window, within which the metal bond pad layer (metal-2 or xe2x80x9clevel 2xe2x80x9d) is deposited. Optionally, a chemically resistant sealing material (such as polyimide) can be deposited on top of the dielectric-3 layer to form a passivation layer, which provides improved resistance against moisture, contamination, etc. The passivation layer is then etched with photolithography process to expose the pad opening. This completes the most basic bond-pad formation process, and the bond pad structure is now ready for being connected to a bonding wire. One or more conductive filled-holes can be formed inside the dielectric-2 layer to provide electrical connection between the metal bond pad and the metal-1 layer. Furthermore, more than one bond pads can be stacked together, each being connected to a respective conductive layer which can be not directly underneath the bond pad. However, this part of the bond pad formation is well known in the art and is thus omitted in the drawings.
The bond peel-off problem occurs when the adhesion force between the metal bond pad (i.e., level-2) and the dielectric-2 layer is not strong enough to resist the thermal and mechanical stress that may be experienced during the wire bonding process to bond the bonding wire to the bond pad. This can also occur between any adjacent layers, for example, between the metal bond pad and an underlying polysilicon layer, between a metal layer and a dielectric layer, between a dielectric layer and a polysilicon layer, and between a barrier layer and a dielectric layer, etc. With the dimension of the semiconductor devices becoming increasingly smaller, the bond-pad peel-off problem becomes substantially more profound, and has become a major factor in holding back further progress in increasing production yields.
FIG. 2 shows a side view of a prior art bond pad structure designed to improve the stability of the bond pad by minimizing the bond pad lift-off problem. A contact, i.e., a via, is formed within the dielectric-2 layer which is filled with a level-2 material to form the bond pad open area which is in contact with the underlying level-1 layer. Each of the level-1 or level-2 layer can be a metal or semiconductor (for example, polysilicon) material. This can be a M2-via-M1 structure or a M2-contact-polysilicon structure. M1 indicates a first metal and M2 indicates a second metal. FIG. 2 also shows that a small overhang is also formed which extends from the bond pad open area and is deposited on top of the dielectric-2 layer. As described the metal-1 layer can be a metal layer or a polysilicon layer. Typically, the underlying layer (level-1 layer) has good adhesive characteristic with the metal layer, and the large contact surface provided by the formation of the via provides a substantially enhanced adhesion. However, under the high thermal and/or vibrational stress encountered during the wire bonding process, cracks can be formed in the portion of the dielectric-2 layer underlying the overhang. Once the crack is formed, it can propagate along the interface between the metal bond pad and the dielectric-2 layer, thus causing the bond pad peeling-off to occur.
Typically, the wire bonding process can be approximately categorized into two main types: the gold wire/gold ball bonding process and the aluminum wire wedge bonding process. The aluminum wire wedge bonding process is widely used in chip-on-board (COB) applications in which the aluminum wire is welded to the bond pad via a combination of ultrasonic vibrations and pressure applied to the wedge. The gold wire/gold ball bonding process is typically accomplished by pressing the wire, which is first formed into a ball, against the bond pad at an elevated temperature. The aluminum wire wedge bonding process is generally less accurate in establishing the bonding position and less uniform in the applied bonding pressure, and, hence, it is more prone to the bond peel-off problem relative to the gold wire/ball bonding process, mainly due to the non-uniformity of mechanical and/or thermal stresses.
FIG. 3 shows the cross-section of another prior art improved bond pad structure, in which a plurality of anchors are formed inside the dielectric-2 layer connecting the metal bond pad and the metal-1 layer. The anchors provide newly increased horizontally contacting surface with the metal-1 layer, as well as extra vertically contacting surface with the dielectric-2 layer. Both can contribute to an increased adhesion force and increased stability of the metal bond pad.
Bond-pad peeling-off or lift-off has been a major unsettling problem besetting the integrated circuit packaging industry involving the wire bonding technology. Many possible solutions have been suggested and implemented, as illustrated in the following prior art references.
U.S. Pat. No. 4,060,828 discloses a semiconductor device having a multi-layer wiring structure with an additional through-hole interconnection formed in the insulating layer beneath the bonding pad of the wiring layer. The purpose of the ""828 patent is to provide additional, and protected, electrical contact between the bonding pad and another wiring layer therebelow, such that if the exposed portion of the bonding pad is corroded and thus becoming disconnected, the additional electrical contact formed through the insulation layer can still provide the needed connection. While the ""828 patent does not directly address the bond pad peel-off problem, the concept of providing a through-hole interconnection structure in the insulation layer immediately underlying the metal layer as disclosed in the ""828 patent has been adopted, though mostly in modified form, by essentially all the prior art processes dealing with solving the problem of bond pad peel-off to provide an anchored structure.
U.S. Pat. No. 4,981,061 discloses a semiconductor device which comprises a first insulating layer formed on the major surface of the semiconductor substrate including an active region. A first contact hole is formed at a position in the first insulating layer corresponding to the active region and a first conductive layer is formed in the first contact hole and a portion of the first insulating layer around the contact hole. Then a second insulating layer is formed on the first conductive layer and the first insulating layer, and a second contact hole is formed at a position in the second insulating layer corresponding to the first conductive layer and located above the first contact hole. Subsequently, a second conductive layer is formed on the second insulating layer and fills the second contact hole. Finally a bonding wire is connected to the second conductive layer in regions located above the first and second contact holes. With the structure disclosed in the ""061 patent, the pressure applied to the second insulating layer during wire bonding is supported by columnar portions of the first and second conductive layers filled in the first and second contact holes. Thus, the pressure acting on the second insulating layer is reduced to suppress occurrence of cracks.
U.S. Pat. No. 5,309,205 discloses a bond pad structure which is formed by depositing a barrier layer over an underlying region of a semiconductor device, and then depositing a first conductive layer over the barrier layer. The barrier layer and conductive layer are then patterned and etched to define a conductive region. In the ""205 patent, the conductive region is formed in the shape of a grid, and a second conductive layer is deposited over the conductive region and a portion of the exposed underlying region. The second conductive layer makes a good adhesive contact with the underlying region, thus preventing bond pad lift off.
U.S. Pat. Nos. 5,248,903 and 5,284,797 disclose a bond pad structure which alleviates bond pad lift problems encountered during wire bonding by providing a composite bond pad, which includes an upper bond pad and a lower bond pad, and an insulating component therebetween. At least one opening is provided through the insulating component, extending from the bottom bond pad to the upper bond pad. The at least one opening is aligned with a peripheral region of the bottom bond pad. A conductive material is then provided which fills the plurality of openings, and electrically connects the top and bottom bond pads. The at least one opening can be a plurality of conductive vias, a ring-like opening extending around the peripheral region, or one or more elongated slit-like openings. The need to form the upper and lower bond pads in a single bond pad structure can substantially increase the production cost.
U.S. Pat. No. 5,309,025 discloses an improved bond pad structure which reduces bond pad lift off problems. The bond pad disclosed in the ""025 patent includes a barrier layer, and is formed by first depositing a barrier layer over an underlying region of a semiconductor device, and then depositing a first conductive layer over the barrier layer. The barrier layer and the conductive layer are then patterned and etched to define a conductive region. A plurality of the conductive regions are formed each of which is isolated from the ourside by the formation of an insulative sidewall. A second conductive layer is deposited over the conductive region and a portion of the exposed underlying region. The second conductive layer makes a good adhesive contact with the underlying region, thus preventing bond pad lift off.
U.S. Pat. No. 5,707,894 discloses an improved bonding pad structure and the process for forming the same which reduces the bond pad peeling problem between the bonding pad layer and an underlying layer. The method disclosed in the ""894 patent comprises the steps of first forming a plurality of anchor pads on the substrate surface in the bonding pad area. Next, a first insulating layer is formed over the substrate surface and the anchor pads. A plurality of via holes are formed through the first insulating layer which are filled with the same material as a second metal layer, which covers the first insulation layer, so as to form a conductive connection anchor pads and the second metal layer. The via holes have a smaller cross-sectional area than the anchor pads so that the combination of the anchor pads and the second metal form small xe2x80x9chooksxe2x80x9d into the first insulating layer that hold the second metal layer (i.e., the bonding pad layer) to the underlying layer.
There are advantages and disadvantages of using the inventions described above. However, in light of the ever-present urgency to reduce production cost in a highly competitive semiconductors market, it is almost imperative to explore other options, which may work alone or additively to the existing techniques, to further ensure the absence of bond pad peel-off problem and improve production yields.
The primary object of the present invention is to develop an improved bond pad structure with an edge strengthening member for use in wire bonding applications during the packaging operation of integrated circuit devices. More specifically, the primary object of the present invention is to develop an alternative bond pad structure which minimizes the lift-off problem by providing an edge strengthening member so as not to require the use of any of the anchoring techniques suggested in the prior art. However, the technology developed in the present invention can also be used in conjunction with several of the prior art techniques, if this is so desired by the manufacturer.
In the novel bond pad structure of the present invention, the edge strengthening member comprises a guard band which is provided along, and separated from, one or more edges, either completely or partially, of the bond pad. The guard band has an elongated xe2x80x9cbandxe2x80x9d structure and is connected to the level-1 layer through one or more filled-holes. One of the main functions of the bond guard is that it can effectively prevent the propagation of cracks, when they are formed, in the dielectric layer adjacent the bond pad, especially along the interface between the bond pad and the dielectric layer. It has been discovered by the inventors of the present invention that the propagation of cracks is one of the major factors contributing to the bond pad lift-off.
With the edge strengthening of the present invention, an anchoring structure can be provided underneath the bond pad to provide enhanced adhesion. Preferably, the single anchoring structure with a plurality of interconnected line segments as disclosed in a co-pending application by the same inventors is utilized.
One of the most effective ways of stopping the propagation of cracks is to form interlocking structures in the opposing edges of the bond pad and the bond guard. The interlocking structures can be simple teethed structure, or a labyrinthine-type keyed structure for maximum efficiency. One of the advantages of the present invention is that, since a different interlocking structure only involves the use of a different mask, no major additional efforts are required. Thus, the implementation of the improved bond pad structure of the present invention will not result in substantially increased production cost.